The Power Supply Design Suite in PSIM provides a quick and convenient solution for resonant LLC converter design. Resonant LLC converters are widely used in power electronics for wide line regulation and load regulation while maintaining soft-switching over a wide range with high peak efficiency. Optimal design of a resonant LLC converter, however, is a non-trivial task as the converter is highly nonlinear and the design process involves many iterations. Such a task is made considerably easier with the Power Supply Design Suite.
The Design Suite can automatically calculate design parameters, such as the operating frequency range, resonant tank values, and can obtain load and line regulations for various applications. One unique feature of the Design Suite is its capability to determine the exact frequency range for both load and line regulations.
The Design Suite will greatly help users reduce design iterations and find the optimum values of the quality factor, inductance ratio, and frequency range operation, and generate a complete resonant circuit that is operational and ready to simulate.
The Design Suite provides two design tools and a lookup table based feedforward control for optimal and robust design of resonant LLC converters and other resonant converters:
As the design tools are instantaneous in generating design curves and output waveforms, it will take users only minutes to optimize a resonant converter. Details of the Steady State Solver Tool, the Design Curve Tool, and feedforward control are explained in the sections below.
With the capability to quickly create an LLC resonant converter with the detailed circuit model, the Power Supply Design Suite offers significant benefit and advantages to engineers in the following ways:
A typical LLC resonant system consists of a dc bus, full-bridge/half-bridge voltage source inverter, LLC resonant tank, high-frequency transformer, diode bridge, output capacitor filter, and dc load. The overall structure of a resonant LLC template is shown below:
Figure 1.1: A typical resonant LLC power converter.
The choice between half-bridge and full-bridge inverter at the input depends on the power level and input side voltage level. Similarly, the half-bridge or full-bridge diode bridge at the output side depends on output voltage requirement and system power level.
The following design templates are provided in the Power Supply Design Suite:
The Design Suite can be used for the design and optimization of the LLC resonant tank in various power conversion applications. To illustrate the process, we will take the full-bridge resonant LLC converter for 400V/48V telecom power supplies application as an example in this tutorial.
The converter has the following input and output specifications:
Input: Vin_rated = 400V; Vin_min = 320V; Vin_max = 480V; f_res = 200 kHz
Output: Vo_rated = 48V; Vo_min = 42V; Vo_max = 58V; Po_rated = 1kW
The rated input voltage is 400V with 20% variation. The variation in required output voltage is from 42V to 58V with the rated value of 48V (typical telecom power supplies requirement).
The key aspect in resonant LLC design is finding the optimum values of the quality factor, inductance ratio, and frequency range operation. Once optimized values of quality factor and inductance are determined, the resonant component values can be calculated.
We can select the initial values of rated quality factor (Q_rated) and parallel-to-series inductance ratio (K_ind) in the medium range, and then fine-tune the design with the help of the design tools in the Design Suite to find the optimized values. For this example, we select the initial values as below:
Q_rated = 0.5
K_ind = 5
Running the Power Supply Design Suite involves the following steps:
Now we will look at all the steps and their functionality in detail.
To run the Design Suite template, follow the steps below:
In PSIM, go to Design Suites >> Power Supply Design Suite, and select Full-bridge Resonant LLC.
A dialog window will appear as shown in Figure 2.1. Click on Unpack to unpack the files to the default folder. To unpack to a different folder, click on Change Folder to browse the folder, or enter the folder name.
Figure 2.1: Unpacking the package file.
After files are unpacked, a template circuit will be displayed as shown below.
Figure 1: The unpacked resonant LLC full-bridge template from the Design Suite
At the left of the schematic is the Parameter Panel. It allows users to define input design specifications, and launch the Steady State Solver Tool and the Design Curve Tool.
The parameter file on the left of the schematic stores the calculated parameter values for the circuit.
For this example, enter the values as below:
Input Specifications:
Vin (operating input voltage)= 400
Vin_rated (rated input voltage)= 400
Vin_min (minimum input voltage)= 320
Vin_max (maximum input voltage)= 480
Output Requirement:
Vo (operating output voltage)= 48
Vo_rated (rated output voltage)= 48
Vo_min (minimum output voltage)= 42
Vo_max (maximum output voltage)= 58
Po_rated (rated output power)= 1000
K_load (load factor)= 1
Operating Conditions:
f_res (resonant frequency)= 200k
Q_rated (rated quality factor)= 0.5
K_ind (parallel-to-series inductance ratio Lm/Ls)= 5
K_rel_freq (relative frequency factor)= 0.75
The quality factor Q is defined as:
Where R is the load resistance referred to the transformer primary side.
The inductance factor K_ind is defined as: K_ind = Lm / Ls.
The load factor K_load is between 0 to 1, where 1 means 100% load, and 0 means no load.
The relative frequency factor is defined as: K_rel_freq = f_sw / f_res where f_sw is the operating switching frequency.
In the schematic, the transformer turns ratio a_sp is defined as:
For the above-selected example of 320V – 480V to 42V – 58V design, we can calculate the range of required dc gain for the output regulation based on the selected turns ratio as follow:
G_dc_max = Vo_max/(Vin_min*a_sp)
For this example, the value of G_dc_max is 1.45.
G_dc_min = Vo_min/(Vin_max*a_sp)
For this example, the value of G_dc_min is 0.7.
Once you enter the output requirement, input specifications, and operating conditions, the output calculation will be done internally for resonant tank values, output load, operating switching frequency, and transformer turns ratio. The standard mathematical formulae are provided in the parameter file for this output calculation.
As the required dc gain range is from 1.45 to 0.70, we can quickly find that the relative frequency range is from 0.62 to 1.61 at initially selected quality factor of 0.5 and inductance ratio of 5 with the help of the Steady State Solver tool or the Design Curve tool. We can then vary the quality factor and inductance ratio to observe the frequency range variation, RMS variation, peak variation, and other output conditions variation to find the final optimum value of quality factor and inductance ratio.
A good design optimization needs to have a narrow frequency range, low circulating current (lower I_Lm), lower and uniform RMS values (lower I_sw_rms), lower light load losses, lower peak values (lower I_sw_peak and I_diode_peak), lower turn-off losses (lower I_Cs(0)), flatter efficiency curve, etc. One can select their optimization objectives and proceed accordingly with the help of the tools. This design example is elaborated in the next sections.
It should be noted that the load resistance R in the above expressions is the actual resistance value without approximation as the design method is based on the time-domain method. The equivalent resistance, Re = 8/π^2 Ro, which is used in the conventional frequency harmonic approximation (FHA) method is not valid here. The actual resistance R is modified to Re in the FHA method as an approximation for the diode bridge current in the continuous conduction mode. Since the resonant LLC can have the diode bridge current in the discontinuous conduction mode, the FHA method can give a large error when operating away from the resonant frequency due to high harmonic content in the waveform.
In fact, the most useful mode of the resonant LLC is the boost mode below the resonant region. This boost mode has the diode bridge current in the discontinuous conduction mode to provide a dc gain of more than 1. There are further some other CCM and DCM associated with diode bridge current with very high harmonic content. The method used in this Design Suite analyzes the resonant LLC circuit in the time-domain and can handle both continuous and discontinuous modes and find necessary boundary conditions. The time-domain method in this suite includes all the possible harmonics, and it provides accurate results and calculations without any approximation.
The Steady-State Solver Tool performs a fast steady-state analysis. This tool provides fast resonant waveforms and other waveforms, and peak and RMS values for device selection and loss calculation. All the waveforms and output parameters are calculated and obtained instantly.
A dialog of the Steady State Solve Tool is shown below in Figure 2.3.
The input specifications of the Steady State Solver Tool are on the left side. By default, the input specifications are the same as the ones in the Parameter Panel. However, one has the freedom to change these values. To perform the analysis, click on the button Calculate. Key steady-state waveforms are displayed on the right.
The steady-state waveforms at the extreme and worst cases can be obtained to verify soft-switching, maximum dc gain, minimum frequency value, peak stress value, maximum conduction loss value, etc.
Figure 2.3: Steady-State Solver tool with calculated output parameters and key waveforms.
Once input parameters are defined, the tool will calculate the following output values:
G_dc = DC gain of the resonant tank
G_dc_min = Minimum value of DC gain required
G_dc_max = Maximum value of DC gain required
Vo = DC output voltage
Po = Operated/calculated value of active power/average power
Ro = Value of output load resistance
I_Cs(0) = Initial value of resonant or switch current/turn off current
I_Cs_peak = Peak value of the current through the resonant capacitor Cs
I_Cs_rms = RMS value of the current through the resonant capacitor Cs
V_Cs_peak = Peak value of the voltage across the resonant capacitor Cs
I_sw_peak = Peak amplitude value of the switch current
I_sw_avg = Average value of the switch current
I_sw_rms = RMS value of the switch current in one cycle through the switch
I_diode_peak = Peak amplitude value of the output diode current
I_diode_avg = Average value of the output diode current
I_Lm_peak = Peak amplitude value of the magnetizing current
f_sw = Switching frequency
Ls = Resonant inductance, Ls
Cs = Resonant capacitance, Cs
Lm = Magnetizing inductance or parallel inductance Lm
Q = Operating value of the quality factor
The output values include the RMS value of the switch current which is needed for switch conduction loss calculation. The peak values of the switch current are also provided for proper switch calculation based on power or voltage rating. The RMS and peak value current through the series resonant capacitor and series resonant inductor will be the same as the switch.
The initial value or turn-off value of the switch current is provided to find out turn-off losses.
The output calculations also include the average value of current through diodes which are needed for total power loss calculation due to voltage drop across the diode. The peak value of magnetizing current will be helpful in magnetic core design.
The resonant component values along with actual load resistance can be also found at any input conditions.
The main features of the Steady State Solver Tool are:
As in the selected design example, we know that the gain requirement is from 1.45 to 0.70. Using the solver tool, we can quickly find the required range of relative frequency for any entered Q_rated and K_ind. For example, the required relative frequency is from 0.66 to 1.49 at the Q_rated = 0.6 and K_ind = 4. Similarly, we can find any other frequency range, RMS variation, peak variation, etc. for different design comparisons at any other quality factor, inductance ratio, or at any other input conditions.
Another interesting thing about the Steady State Solver is that it will give users the option to quickly find out the minimum value of relative frequency up to which the ZVS is possible at any selected input conditions. In other words, the minimum switching frequency will be automatically calculated at the ZVS-ZCS boundary in the below resonant region. A design example is shown in figure 2.4 using the steady-state solver with waveforms at ZVS-ZCS boundary and the output calculations at this boundary.
In Figure 2.4, a resonant LLC application is selected with input specs or parameters shown in the left-right panel. The quality factor of 0.3 and inductance ratio of 6 is selected for these input specs, the calculated min relative frequency is 0.49 and max dc gain is 1.85338. The other important output calculations can be seen at the output parameter in the left bottom panel. The corresponding resonant and other waveforms are shown to have the ZVS-ZCS boundary.
Figure 2.4: Steady-State Solver tool with output parameters and key waveforms at ZVS/ZCS boundary at the minimum relative frequency factor of 0.49 when Q_rated = 0.3 and K_ind = 6
As resonant LLC design has to go through many iterations to find optimal resonant values, having a very fast steady-state solver will be very useful to find any complex answers related to resonant LLC design.
Using the Design Curve Tool, one can compare dc gain values, RMS values, peak values, and average values variation with relative frequency at different values of inductance ratios and quality factors. The shape of the gain curve will impact the conduction loss and control dynamics, to balance the conflict goals; one can examine the balance in steepness and flatness of the curve by varying the quality factors and the inductance ratios. Based on the design and optimization objective, one can play with the steepness and flatness of the design curves to have a narrow frequency range, lower RMS, lower Peak values, etc.
Finding an optimum frequency range for wide load and line range applications is a challenging task with many iterations and simulation runs. The Design Curve Tool helps significantly reduce the design iteration and find the optimum values of the quality factor, inductance ratio, and frequency range operation from the design graphs. Users will have options to obtain design curves for dc gain of the LLC tank, RMS value of current through switch, the peak value of current through switch, the peak value of magnetizing current, and the average value of current through diode at various quality factor and inductance ratio with the variation in relative frequency factor.
Two sets of design curves and an Excel file with output parameters will be generated automatically using the tool. One has the option to modify input specifications with the range of Q_rated and K_ind in the left interface of the tool. One panel displays curves at different values of K_ind with a fixed Q_rated, and another displays curves with different values of Q_rated with a fixed K_ind.
The Design Curve Tool is shown in Figure 2.5. Users can click on any of the calculate buttons to get the desired design curves. To demonstrate, we have clicked on Calculate G_dc to display the dc gain curves (as shown in Figure 2.5) with respect to the relative frequency factor (K_rel_freq) to find the range of relative frequency for the required dc gain. At the same time, the Excel file that shows the results of different Q_rated and K_ind is generated automatically as shown in Fig. 2.6.
In the Excel file, the detailed output calculations at the minimum switching frequency and maximum switching frequency are provided based on minimum to maximum DC gain needed in this example. The output calculations include RMS, peak, average values associated with current and voltage of the switch, diode, resonant components, etc. The resonant component values are also calculated and shown for each entered value of Q_rated and K_ind.
Figure 2.5: Design Curve Tool for comparing dc gain variation with relative frequency at different values of quality factor and inductance ratio
Note: The maximum value of the relative frequency factor is restricted to 2 for practical reasons. The minimum value relative frequency factor is automatically calculated up to which ZVS (zero voltage switching) is possible. In other words, the minimum switching frequency will be automatically calculated at the ZVS-ZCS (zero current switching) boundary in the below resonant region.
Figure 2.6: Generated Excel file with Q_rated = 0.4, K_ind = 4 to 7 and K_ind=4, Q_rated = 0.2 to 0.8
In Fig. 2.6, the detailed output calculations are generated at the minimum and maximum switching frequencies at each set of Q_rated and K_ind. The upper highlighted portion shows the variation in relative frequency factor (K_rel_freq) from maximum to minimum for each entered K_ind (from 3 to 7) at Q_rated = 0.4. The bottom highlighted portion shows the variation in K_rel_freq for each entered Q_rated (from 0.2 to 0.8) at K_ind = 4.
For design graph 1: X-axis is K_rel_freq, Y-axis can be any of G_dc, I_sw_rms, I_sw_peak, I_Lm_peak, I_diode_avg with the following values:
For design graph 2: X-axis is K_rel_freq, Y-axis can be any of G_dc, I_sw_rms, I_sw_peak, I_Lm_peak, I_diode_avg with the following values:
Key features of the Design Curve Tool are:
As discussed in the Steady State Solver tool, we can narrow the frequency range based on the known dc gain range inside the design curves. After that, we can directly compare the variation in dc gain, RMS values, and peak values with relative frequency variation at different values of quality factor and inductance ratio or any new input parameters. Since the required gain range is from 0.75 to 1.25 in the above design example, we obtained different design curves with variation in quality factor from 0.2 to 2 and inductance ratios from 2 to 20 to find a near-optimum answer based on efficiency, magnetics size, and power density trade-offs. One can decide any other optimization objective based on one’s hardware requirements.
It is found that using the Steady State Solver tool and the Design Curve tool, K_ind in between 5 to 6 and Q_rated in between 0.3 to 0.4 will give us a narrow range of frequency for voltage regulation with a lower RMS current over a wide range of load for this example. From a design point of view, a low value of Q_rated provides a design with a smaller size of magnetics and lower voltage stress on the capacitor. But on the other hand, by increasing the value of Q_rated, a lower switching frequency will be required to obtain the minimum dc gain. Also, a higher K_ind can ensure a lower transformer circulating current with lower power device conduction losses.
Clearly, the designer needs to find a trade-off between wide dc gain requirements (covering both buck and boost regions) and the amount of circulating current.
After several iterations using the Steady State Tool and the Design Curve Tool, optimized values of the quality factor and inductance ratio can be obtained.
After the design is finalized, enter the final design values of Q_rated and K_ind into the Parameter Panel. Then click on the button Update Parameter File in the Parameter Panel to update the parameter file “parameters‐main.txt” in the schematic. This parameter file contains the parameters entered by the user and the output calculated by the Design Suite. One typical example of a parameter file and the calculated output inside the parameter file is shown in the figure below.
A final value of Q_rated and K_ind are selected from the design considering the trade-off between line-load regulation, lower RMS current, narrow frequency range, lower magnetics size, etc. The selected values are:
Q_rated = 0.3
K_ind = 6
Figure 2.7: (a) Parameter file for full-bridge resonant LLC for this application. (b) The values of all the input specs and calculated parameters inside the parameter file
If any of the parameters in the Parameter Panel are changed, the parameter file in the schematic needs to be updated.
After the design is finalized, one can simulate the circuit in PSIM to validate the design. A lookup table of the relative frequency factor versus the voltage gain will be automatically generated by the Design Suite. This will provide feedforward control which will output the switching frequency close to the required value to achieve the desired output voltage regulation at varying load and line conditions.
The simulation and the Steady State Solver results are shown at the minimum input voltage (320V) and rated output voltage (48V).
Figure 2.8: Simulation results at the rated output voltage (48V) and minimum input voltage (320V) at K_rel_freq = 0.718 @143.6kHz (below resonant mode).
Figure 2.9: Waveforms from the Steady State Tool at the rated output voltage (48V) and minimum input voltage (320V) at K_rel_freq = 0.718 @143.6kHz (below resonant mode).
Figure 2.8 shows the simulated results at the rated output voltage (48V) and minimum input voltage (320V) at K_rel_freq = 0.718 (143.6kHz) (below resonant mode). The Q_rated is 0.3 and K_ind = 6 with the required G_dc = 1.2005.
Figure 2.9 shows the same waveforms under the same operating conditions but from the Steady State Solver. The waveforms are identical, validating the Steady State Solver.
Figure 2.10: Simulation results at the rated output voltage (48V) and maximum input voltage (480V) at K_rel_freq = 1.56 @302kHz (above resonant mode).
Figure 2.10 shows the simulated results at the maximum input voltage (480V) and rated output voltage (48V) at K_rel_freq = 1.56 (302kHz) (above resonant mode). The Q_rated is 0.3 and K_ind = 6 with the required G_dc = 0.8001.
The simulations can also be done by including relevant parasitic, dead-time, MOSFET capacitance, etc. The calculated frequency from the tools will provide precise enough results to have proper load and line regulations for a non-ideal or lossy system.
Feedforward control provides a solution very close to the required operating point under various line regulations and load regulations.
A typical lookup table for feedforward control is shown below. In this example, the quality factor is 0.3 and the inductance ratio is 6. The variation in dc gain is from 1.9034 to 0.7069 for change in relative frequency from 0.4899 to 2.
One can select any frequency range from the gain curve to have a wide range design for their applications. Similarly, one can select quality factor and inductance ratio to have 2:1 variation in the gain curve or 1.5:1 variation in the gain curve based on the applications.
Figure 2.11: The lookup table used in feedforward control at the quality factor of 0.3 and inductance ratio of 6 with dc gain variation from 0.7069 to 1.9034 for a relative frequency from 2 to 0.4899.
Besides the Full-bridge Resonant LLC template, two other templates are provided for resonant LLC and other resonant converters, as described below.
A template for a half-bridge resonant LLC converter for constant output voltage and variable output voltage applications is provided. The template and the circuit are shown below.
Figure 3.2: The unpacked resonant LLC half-bridge template from the design suite.
A template for a full-bridge resonant LLC-L converter is provided. The template and the circuit are shown below. This template has a 4th order general resonant tank template that can be used to design and optimize 5 different resonant converters (LC, LLC, CLL, CL, LLC-L). The applications for higher-order resonant tanks include wireless power transfer (WPT), inductive power transfer (IPT), EV on-board battery charger (OBC), etc.
Figure 3.4: The unpacked general resonant LLC-L template from the design suite.
Unlike the other LLC converter circuits, this circuit has 4 resonant elements: Cs, Ls1, Ls2, and Lm. The inductance Ls2 can be the sum of the transformer secondary winding leakage inductance and the external inductance added to the transformer secondary side and reflected back to the primary side.
Because of the addition of the extra element, the analysis of the resonant LLC-L/CL-L-L converter is much more complicated. Moreover, additional factors need to be considered in the converter design and optimization. Such a design process is made considerably easier with the Design Suite.