Design and DSP Implementation of 3.3-kW Resonant LLC On-Board Charger
Introduction
Resonant DC-DC converters are widely used in applications such as solar PV, telecom server, battery charger, wireless charging, etc. Resonant converters with LLC, CLL, LCC, CLLC, and CLLLC resonant tanks have recently attracted much attention due to the soft-switching characteristics over a wide load/line range, high peak efficiency, high power density, and low EMI footprint. However, the optimal design of a resonant converter with proper closed-loop control is not a trivial task due to high nonlinearity, iterative design process required for wide load/line range conditions, and higher-order transfer function of the converter plant model.
The Power Supply Design Suite (PSDS) in PSIM provides design tools for analyzing and optimizing resonant converters with accuracy. The add-on software SmartCtrl provides design tools for closed-loop analysis and controller design. The SimCoder module enables the user to generate DSP code for the close-loop controller automatically.
This application note helps users, step-by-step, to design the resonant components, design a closed-loop controller, and generate DSP control code for the isolated DC-DC stage of a 3.3 kW EV On-Board Charger (OBC).
System Specifications
An LLC resonant converter is typically used as the isolated DC-DC stage of an EV On-Board Charger (OBC). The selected LLC resonant converter for this OBC application has the following specifications:
Vin_rated = 400V; Vin_min = 390V; Vin_max =410V
Vo_rated = 420V; Vo_min = 300V; Vo_max = 420V
Po_rated = 3300W
f_res = 200 kHz
Step-by-Step Procedures for Open- and Close-Loop Design
Several major steps are needed to design an LLC resonant converter with the proper close loop control:
- Optimize resonant network parameters for the selected quality factor, magnetics ratio, and frequency range using PSDS.
- Perform AC analysis on the designed LLC resonant converter circuit.
- Design closed loop controllers with SmartCtrl.
- Generate DSP code with the SimCoder module.
The following describes the details of each step.
Step 1: Resonant Components Optimization with PSDS.
In PSIM, go to Design Suites >> Power Supply Design Suite and select Full-bridge Resonant LLC. After files are unpacked, a template circuit will be displayed, as shown below.
Figure 1: The unpacked resonant LLC full-bridge template from the Design Suite
The Parameter Panel is on the left of the schematic window. It allows users to input the design specifications, launch the Steady State Solver Tool and the Design Curve Tool. The parameter file on the left of the circuit stores the calculated parameter values of the LLC circuit.
For this application, we have selected Q_rated as 0.4 and K_ind as 4 to achieve the optimal LLC converter design and narrower frequency variation range for the given line and load conditions.
The resonant tank component values of Ls, Cs, Lm are calculated as:
Ls = (Q_rated*Ro_rated_pri)/(2*pi*f_res) = 21 µH
Cs = 1/(2*pi*f_res*Q_rated*Ro_rated_pri) = 30 nF
Lm = K_ind*Ls = 84 µH
Where the variable Ro_rated_pri is the rated value of output resistance referred to the primary side.
To meet the gain requirement, 0.68 to 1.45 variation of relative frequency factor (K_rel_freq) is required (users can check the application note AN003-01 for details). After the LLC power stage is designed, we need to design the closed-loop controller so that the closed-loop resonant LLC converter can meet the design targets.
For this OBC application, the close loop LLC resonant converter needs to regulate the output voltage at 420V in the constant voltage (CV) region and regulate the output current at 7.8A in the constant current (CC) region. Users need to check ZVS and ZCS conditions in the CC region since the output voltage in this region can vary from 300V to 420V.
Step 2: AC Analysis for Inner Current Loop Design
There are several types of ac sweep blocks available in PSIM, namely, AC Sweep block, AC Sweep (1) block, AC Sweep (2) block, and AC Sweep (multi-sine) block.
In AC Sweep (multi-sine) block, the excitation source consists of a signal with multiple frequencies. The circuit is run to the steady-state, and the frequency response is obtained with a one-time-domain simulation run. We will use the AC Sweep (multi-sine) block in this application note.
Users can find more details on different types of ac sweep blocks available in PSIM in the application note AN006-1.
We can set parameter values of the AC Sweep (multi-sine) block as shown in Figure 2:
- Set the start frequency to 100 Hz and the end frequency to 40 kHz. Note: The switching frequency can vary from 0.5 to 2 times the resonant frequency (200 kHz), which means the lowest switching frequency can be as low as 100 kHz. The end frequency is set as half of the lowest switching frequency based on the Nyquist–Shannon sampling theorem.
- Enter 51 data points to have enough resolution points per decade.
- Set Flag as 1 so that the points are distributed uniformly in the Log scale.
- Select the same source name as that of excitation AC sine source.
- The amplitude of the applied AC perturbation is selected as 0.075, which is 10% of the operating relative frequency value K_rel_freq=0.75.
- Set the number of the start frequency cycle used for ac sweep calculation as 1.
- Set the estimated time for steady-state as 0.003 seconds.
Figure 2: Parameters of the AC Sweep (multi-sine) block
Step 2.1: Setting Up the Circuit for AC Analysis
The ac analysis set up of the resonant LLC converter in z-domain used for inner current loop design is shown in Figure 3. The AC Sweep block, AC Sweep Probe, ac sine perturbation source, Unit Delay block, and Zero-Order Hold block are highlighted.
The schematic file “Resonant LLC – current loop (ac sweep).psimsch” can be found in the “simu” subfolder of this application note folder.
Figure 3: The resonant LLC converter with ac sweep set up in z-domain for inner current loop design
Since the dc gain decreases with a switching frequency increase in a resonant LLC converter, a negative one (-1) is multiplied before the AC Sweep Probe to compensate for the inverse relationship between dc gain and varying frequency.
It should be noted that the sampling frequency of Zero-Order Hold and Unit Delay blocks are selected as 100kHz for practical limitation of DSP ADC.
Since output current I_sec is in discontinuous current mode (DCM) with significant harmonic contents when K_rel_freq is 0.8, a second-order low pass filter with a cut-off frequency of 20 kHz is needed before the AC Sweep Probe as highlighted in Figure 3.
Step 2.2: AC Analysis Results
After running the ac sweep, the amplitude and phase plots will be displayed in Simview as shown in Figure 4.
Figure 4: The amplitude and phase plots of the resonant LLC converter in the z-domain
Step 3: Controller Design in SmartCtrl for the Inner Current Loop
SmartCtrl is a general-purpose controller design software specifically for power electronics applications.
In this step, we will export ac sweep results generated in PSIM to SmartCtrl for the controller design. The sub-steps used in SmartCtrl are described below:
Step 3.1: Export the AC Sweep Frequency Response Data into SmartCtrl
Click the SmartCtrl software button (Figure 5), a window will pop up to export the PSIM ac sweep results to SmartCtrl.
Figure 5: This figure shows where to access the SmartCtrl tool in PSIM Schematic
The new pop-up window (SmartCtrl Export) is shown in Figure 6. The SmartCtrl Export window provides the option to select the type of transfer functions (shown in the red box). Select Current Transfer Function for the inner current loop design. Define the value of the required output current and the switching frequency as shown in the blue box.
Click the “OK” button to continue.
Figure 6: Window to export sweep results from PSIM to SmartCtrl
Step 3.2: Automatically Load The Amplitude and Phase Plots
Once we click “OK” on the SmartCtrl Export window in the last step, a new pop-up window will be opened to automatically load the amplitude and phase plots generated by ac sweep in PSIM (Figure 7).
Click the “OK” button to continue.
Figure 7: The amplitude and phase plots imported into SmartCtrl
Step 3.3: Select Sensor and Compensator
The following pop-up windows provide the option to select the sensor and compensator. Select the “current sensor” for the inner current loop as shown in Figure 8. Click the “OK” button to continue. Set current sensor to 1 as shown in Figure 9. Click the “OK” button to continue.
Figure 8: Window to select the current sensor and the compensator Figure 9: Window to set the gain of current sensor
Step 3.4: Click the “Compensator” Tab and Select the Compensator
Click the “compensator” tab to select the type of compensator in the same window as shown in step 3.3. Select the PI compensator as shown in Figure 10.
Click the “OK” button to continue.
Figure 10: Compensator selection window with a PI compensator selected
Step 3.5: Define Peak and Valley Value of the Carrier Waveform
Next, a new window will pop up, as shown below, to define the peak and valley value of the carrier waveform (Figure 11).
It should be noted here that the window to define the peak and valley value of the carrier waveform, as highlighted in blue, is only valid for PWM-controlled power converters and they are not suitable for frequency-controlled resonant converters. They are left as default values.
The voltage error and PI as highlighted in red are only control blocks that are used for the frequency-controlled power converter.
Click the “OK” button to continue.
Figure 11: Window to define peak and valley value of the carrier waveform
Step 3.6: Select the Crossover Frequency and the Phase Margin (PM) Using the Solution Map
In the next step, a Solution Map window will pop up with a PM vs. crossover frequency plot as shown in Figure 12.
Figure 14: Solution Map of PM vs. crossover frequency
Using Solution Map, select a point within the white area to have a stable solution. Each stable solution corresponds to a combination of crossover frequency and PM as shown in the red box in Figure 12.
Click the “OK” button to see system performance in terms of the frequency response and transient response in the final Solution Window.
Step 3.7: Complete the Design Using the Final Solution Window
Finally, we can see our system’s amplitude and phase plots for both open-loop and control-to-output transfer functions in the final Solution Window (Figure 13). The Solution Window also contains transient response and Nyquist plot.
Figure 13: The final SmartCtrl Solution window with amplitude and phase plots for both open-loop and control-to-output transfer functions
It should be noted that the Solution Map window from step 3.6 will always be present (shown in the blue box). The PI controller gains Kp and Ti will be displayed corresponding to the value of PM and crossover frequency selected by the user (shown in red box).
Step 4: Validate the Design in PSIM for the Inner Current Loop
In this step, we will simulate and validate the performance of the closed-loop resonant converter in PSIM.
The schematic file “Resonant LLC – current loop.psimsch” can be found in the “simu” subfolder of this application note folder.
The controller is designed to maintain a rated constant of 7.8A despite any change in load/line variation. This is the requirement of a constant current (CC) mode of operation for this OBC application. We select a PM close to 62.83 degrees and a crossover frequency close to 9.32kHz. The calculated value of Kp is 0.00462, and Ti is 15us, as shown in Figure 13.
It should note here that the value of the gain Kp and Ti can be further tuned in simulation-based on faster dynamics, faster settling time, and decreased transient oscillations. As the result, the final value of Kp is selected as 0.001, and Ti is selected as 11us.
In Figure 14 and Figure 15, the simulation results show the variation in frequency from 0.825 to 1.645 with a step-change in load from 50% to 100% at 16ms. We can see in the figures that a constant rated 7.8A is maintained, and the variation in output voltage is from 418V to 209V.
Figure 14: Closed-loop simulation result with a step-change in load from 50% to 100% at 16ms.
Figure 15: Closed-loop simulation result with a step-change in load from 50% to 100% at 16ms
Step 5: AC Analysis for the Outer Voltage Loop Design
Similar to step 2, we will do an ac sweep over the inner current loop for the design of the outer voltage loop.
We will set the AC Sweep (multi-sine) block to sweep from 10 Hz to 2 kHz for the outer voltage loop (Figure 16). The other parameters inside the block can be set in the same way as explained in step 2.
Figure 16: Parameters of the AC Sweep (multi-sine) block
Step 5.1: Setting Up the Circuit for AC analysis
The resonant LLC converter in z-domain configured for ac analysis is shown below in Figure 17 with AC Sweep block, AC Sweep Probe, ac sine perturbation source, Zero-Order Hold block, and Unit Delay block.
In step 2, we have multiplied a negative one before the AC Sweep Probe to compensate for the inverse relationship between dc gain and varying frequency while doing an ac analysis for the inner current loop design. It should be noted herein Figure 17 that we have multiplied with -1 after the error block or before the PI block while doing an ac analysis for the outer voltage loop design.
Figure 17: The resonant LLC converter with ac sweep set up in z-domain for outer voltage loop design
The schematic file “Resonant LLC – voltage loop (ac sweep).psimsch” can be found in the “simu” subfolder of this application note folder.
Step 5.2: AC Analysis Results
After running the ac sweep, the results will be automatically generated in the Simview with both amplitude and phase plots. In Figure 18, the sweep results for outer voltage loop design are shown at K_rel_freq=0.8, Q=0.4, K=4, and at rated input voltage 400V.
Figure 18: The amplitude and phase plots of the resonant LLC converter in z-domain
Step 6: Controller Design in SmartCtrl for the Outer Voltage Loop
Similar steps will be used in SmartCtrl for the design of the outer voltage loop, as explained in step 3. For the elaborate purpose, we have presented all the sub-steps once again, as shown below:
Step 6.1: Import the AC Sweep Frequency Response Data into SmartCtrl
After clicking on the SmartCtrl software button (Figure 19), a window will pop up to export the PSIM ac sweep simulation results to SmartCtrl.
Figure 19: This figure shows where to access the SmartCtrl tool in PSIM Schematic
The new pop-up window is called the SmartCtrl Export window (Figure 20). The SmartCtrl Export window gives us the option to select the type of transfer functions (shown in the red box). We will select the voltage transfer function for the voltage loop design. It also gives us the option to define the value of the required output voltage and the switching frequency (shown in the blue box).
Click the “OK” button to continue.
Figure 20: Window to export PSIM sweep results to SmartCtrl
Step 6.2: Automatically Load the Amplitude and Phase Plots
Once we click “OK” on the SmartCtrl Export window in the last step, a new pop-up window will be opened to automatically load the amplitude and phase plots generated by ac sweep simulation in PSIM (Figure 21).
Figure 21: The amplitude and phase plots will be automatically loaded
Click on the “OK” button to continue.
Step 6.3: Select Sensor and Regulator
The next pop-up windows provide the options to select the voltage sensor and regulator. Select “isolated voltage sensor” as shown in Figure 22. Set the gain of voltage sensor will be to 1/420 as shown in Figure 23.
Click the “OK” button to continue.
Figure 22: This window gives us the option to select the voltage sensor and regulator Figure 23: This window gives us the option to calculate the gain for the voltage sensor automatically
Step 6.4: Click on the “Compensator” Tab and Select an Appropriate Compensator
A new window will pop up as shown below to select the proper compensator. Select PI compensator for the outer voltage loop design as shown in Figure 24.
Figure 24: Compensator selection window where a PI compensator is selected
Click the “OK” button to continue.
Step 6.5: Define Peak and Valley Value of the Carrier Waveform
Next, a new window will pop up to define the peak and valley value of the carrier waveform as shown in Figure 25.
It should be noted here that the window to define the peak and valley value of the carrier waveform, as highlighted in blue, is only valid for PWM-controlled power converters and they are not suitable for frequency-controlled resonant converters. They are left as default values.
The voltage error and PI as highlighted in red are only control blocks that are used for the frequency-controlled power converter.
Click the “OK” button to continue.
Figure 25: Window to define peak and valley value of the carrier waveform
Step 6.6: Select the Crossover Frequency and the Phase Margin (PM) Using the Solution Map
In the next step, a Solution Map window will pop up with a PM vs. crossover frequency plot (Figure 26).
Using Solution Map, Select a point within the white area to have a stable solution. Each stable solution corresponds to a combination of crossover frequency and PM (shown in the red box in Figure 26).
Click the “OK” button to see system performance in terms of the frequency response and transient response in the final Solution Window.
Figure 26: Solution map of PM vs. crossover frequency
Step 6.7: Complete the Design Using the Final Solution Window
Finally, we can see our system’s amplitude and phase plots for both open-loop and control-to-output transfer functions in the final Solution Window (Figure 27). The Solution Window also contains transient response and Nyquist plot.
Figure 27: The final SmartCtrl Solution window with amplitude and phase plots for both open-loop and control-to-output transfer functions
It should be noted that the Solution Map window from step 6.7 will always be present (shown in the blue box). The PI controller gains Kp and Ti will be displayed corresponding to the value of PM and crossover frequency selected by the user (shown in red box).
Step 7: Validation in PSIM After Both Inner and Outer Loop Design
In this step, we will simulate and validate the performance of inner current and outer voltage loops design back in PSIM. The controller is designed to regulate a rated voltage of 420V at the output despite any change in load and input voltage. This is the requirement of a constant voltage (CV) mode of operation in this OBC application.
The schematic file “Resonant LLC – current and voltage loop.psimsch” can be found in the “simu” subfolder of this application note folder.
We select a PM close to 70.58 degrees and a crossover frequency close to 1.22kHz. The calculated value of Kp is 124.87, and Ti is 317.52us, as shown in Figure 27.
We should note here that we can further tune the value of the Kp and Ti in simulation-based on faster dynamics, faster settling time, and decreased transient oscillations. As the result, the final value for Kp is selected as 11, and Ti is selected as 61us.
We can see that a constant output voltage of 420V is maintained, as shown in Figure 28 and Figure 29. The variation in current waveforms is shown in Figure 29 when the load is changed from 50% to 100%. The operating Q changes from 0.2 to 0.4, and K_ind is fixed at 4. The variation in K_rel_freq is from 0.808 to 0.811 at the rated input 400V.
Figure 28: Closed-loop simulation result with a step-change in load from 50% to 100% at 16ms
Figure 29: Closed-loop simulation result with step-change in load from 50% to 100% at 16ms
Apart from the output regulation for this OBC application, we should note that ZVS for primary switches and ZCS for secondary diodes are maintained under all conditions. For the below resonant operation, as the DC gain is more than 1, the DCM of the output diodes will ensure the ZCS with no reverse recovery problem, as evident from simulation results shown in Figure 29.
Step 8: Automatic Code Generation
We will be using PSIM’s SimCoder Module for the automatic code generation for the close loop controlled resonant circuit. We will combine the SimCoder Module with the F2803x Hardware Target for this application to generate ready-to-run code from a PSIM control schematic for hardware based on the TI F2803x series fixed-point DSP.
The schematic file “Resonant LLC – current and voltage loop (code gen).psimsch” can be found in the “simu” subfolder of this application note folder.
8.1: Setting Up the Close-Loop Controlled Circuit for Automatic Code Generation
We will set up the close-loop resonant LLC circuit for automatic code generation as shown below:
Figure 30: Closed-loop resonant LLC converter set-up for automatic code-generation
In Figure 30, we can see that the close-loop controlled resonant LLC circuit with enabled code generation elements (shown in the red box). The closed-loop controller blocks without code generation elements are disabled (shown in the blue box).
8.2: Location and Description of the F2803x Target Library Used for Code Generation
For fixed-point code generation, a circuit must contain elements from the F2803x Target library. The library is located at Elements >> SimCoder >> F2803x Target. A list of the library elements and the location of the different TI Targets is shown and highlighted below (Figure 31):
Figure 31: Location of the different TI Targets and list of the library elements
The code generation elements from the SimCoder library used in the schematic in Figure 30 are highlighted below in Figure 32:
Figure 32: The elements used from the SimCoder library for the code generation
For F2803x DSP, the input signal range is 0 to 3.3V. The reading mode of the ADC can be set as one of the following:
AC: The input is read as an AC value, ranging from -1.65V to +1.65V.
DC: The input is read as a DC value, and the range is from 0 to +3.3V.
It should be noted here that the inputs of the ADC converter must stay within the input range (0 to +3.3V for dc input, or -1.65V to +1.65V for ac input). It is particularly important to select the type of coupling, gain carefully, and mode of the channel in the ADC to produce the same desired gain for the controller’s input when the circuit is simulated without any code generation elements. The configuration of ADC for this application is shown below in Figure 33:
Figure 33: Configuration of ADC with proper channel gain and channel mode selection
The configuration of the variable frequency PWM is shown below in Figure 34:
Figure 34: Configuration of the variable frequency PWM
The configuration of the single-phase PWM generator is shown below for F2803x in Figure 35:
Figure 35: Configuration of the single-phase PWM generator for F2803x
8.3: Setting “Simulation Control” Parameters
Before the code is generated, SimCoder parameters must be properly set in the Simulation Control dialog. Double click on the Simulation Control block (the clock image). Click on the SimCoder tab, and set the parameters as shown below (Figure 36).
Figure 36: Setting up the Simulation Control dialog
The settings are:
Hardware Target: Set to F2803x and RamDebug. RamDebug is selected in this example for debugging.
CPU Version: Select F28035 (64pin).
Check Fixed-Point Range: Check this box to check the fixed-point range for overflow.
Default Data Type: Select IQ24 for this example.
Please note that checking the fixed-point range for overflow requires additional computation. It is recommended that you perform this check after the circuit is close to being finalized.
8.4: Running the Simulation and Generating the Code
To generate code, select Simulate >> Generate Code (Figure 37). The generated code will be displayed in a separate window, as shown below in Figure 38.
Figure 37: Click on the Simulate tab to see the option to generate the code
Figure 38: The automatically generated C code to be used for DSP
PSIM will create a subfolder inside the folder containing the PSIM circuit file, which is named the same as the PSIM circuit but with “(C code)” added at the end.
In addition to the C code file, PSIM also generates project files, link command files, and all other files necessary for four different project building configurations: RAM Debug, RAM Release, Flash Release, and Flash RAM Release. All these files are stored in the newly created subfolder.
8.5: Simulating the Resonant LLC Converter with F2803x Target Elements
Finally, the resonant LLC converter is simulated with the F2803x target elements included in the schematic verifying the close-loop design. Figure 39 shows the simulated results at the rated output voltage (420V) and rated input voltage (375V).
There is a step-change in load from 50% (on the left side) to 100% (on the right side) at 16ms. The operating Q changes from 0.2 to 0.4, and K_ind is fixed at 4. The output voltage is regulated close to 420V.
Figure 39: Closed-loop simulation result with code generation elements included in the schematic
Conclusions
With the PSDS & SmartCtrl, designing a close loop resonant LLC converter for a wide range of input and output DC-DC applications is made considerably easier and robust.
This application note used the PSDS to find optimal resonant components and SmartCtrl for both inner current and outer voltage loop design. The SimCoder module enabled us to generate automatic code for the DSP implementation. We have validated the final design with a close loop time-domain simulation in PSIM.